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Data Sheet
Table 11. Power Modes and Related Characteristics
ADE7854/ADE7858/ADE7868/ADE7878
Power Mode
All Registers 1
LPOILVL,
CONFIG2
I 2 C/SPI
Functionality
PSM0
State After Hardware Reset
State After Software Reset
PSM1— ADE7878 , ADE7868 Only
Set to default
Set to default
Not available
Set to default
Unchanged
Values set
during PSM0
I 2 C enabled
Active serial port is unchanged if lock-in
procedure has been previously executed
Enabled
All circuits are active and DSP
is in idle mode.
All circuits are active and DSP
is in idle mode.
Current mean absolute values
are computed and the results
unchanged
are stored in the AIMAV,
BIMAV, and CIMAV registers.
The I 2 C or SPI serial port is
enabled with limited
functionality.
PSM2— ADE7878 , ADE7868 Only
Not available
Values set
Disabled
Compares phase currents
during PSM0
unchanged
against the threshold set in
LPOILVL. Triggers IRQ0or IRQ1
pins accordingly. The serial
ports are not available.
PSM3
Not available
Values set
Disabled
Internal circuits shut down
during PSM0
unchanged
and the serial ports are not
available.
1
Setting for all registers except the LPOILVL and CONFIG2 registers.
Table 12. Recommended Actions When Changing Power Modes
Initial Power
Mode
Recommended Actions
Before Setting Next
Power Mode
PSM0
PSM1
Next Power Mode
PSM2
PSM3
PSM0
Stop DSP by setting the run
register = 0x0000.
Current mean absolute
values (mav) computed
immediately.
Wait until the IRQ0 or
IRQ1 pin is triggered
accordingly.
No action
necessary.
Disable HSDC by clearing Bit 6
(HSDEN) to 0 in the CONFIG
register.
Mask interrupts by setting
MASK0 = 0x0 and
MASK1 = 0x0.
Erase interrupt status flags in
the STATUS0 and STATUS1
registers.
xIMAV registers can be
accessed immediately.
PSM1—
ADE7878 ,
ADE7868 Only
No action necessary.
Wait until the IRQ1 pin is
triggered low.
Poll the STATUS1 register
Wait until the IRQ0 or
IRQ1 pin is triggered
accordingly.
No action
necessary.
until Bit 15 (RSTDONE) is
set to 1.
PSM2—
ADE7878 ,
ADE7868 Only
No action necessary.
Wait until the IRQ1 pin is
triggered low.
Poll the STATUS1 register
until Bit 15 (RSTDONE) is
Wait until the IRQ1 pin
triggered low.
Current mean absolute
values compute at this
No action
necessary.
set to 1.
moment.
xIMAV registers may be
accessed from this
moment.
PSM3
No action necessary.
Wait until the IRQ1 pin is
triggered low.
Poll the STATUS1 register
Wait until the IRQ1 pin is
triggered low.
Current mav circuit begins
Wait until the IRQ0 or
IRQ1 pin is triggered
accordingly.
until Bit 15 (RSTDONE) is
set to 1.
computations at this time.
xIMAV registers can be
accessed from this
moment.
Rev. H | Page 25 of 100
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